Integrated circuits are connectable to "the outside world" through bond pads, also referred to as die terminals, die pads, or contact pads. An input buffer, often configured as an invertor, is interposed between the bond pad and active circuitry of the integrated circuit. The input buffer is comprised of buffer transistors which should be protected from voltages caused by electrostatic discharge (ESD) during handling and testing of the integrated circuit. Subjecting a device to ESD is referred to as an ESD event. Typically, an ESD circuit, which is well known in the art, is connected at the bond pad. The ESD circuit is a protection device typically comprised of diodes connected back to back at the bond pad. The ESD circuit protects the buffer transistors from high voltages caused by an ESD event. The ESD circuit keeps the potential of the bond pad from exceeding a maximum value.
In one application shown in FIG. 1, a diode 1 is interposed between the input to the input buffer 2 and a reference node 3. During handling the integrated circuit is not connected to any electrical potentials, and the potential of the reference node 3 is floating. During an ESD event a potential difference develops across the diode 4. If this potential difference is large enough diode 4 is reversed biased allowing the electrostatic current to shunt the active circuitry and buffer transistors of the integrated circuit. However, the diode breakdown voltage may be greater than the breakdown potential of the buffer transistors.
Thus, although the ESD circuit is designed to withstand high current levels, the bond pad potential may be greater than the breakdown voltage of the buffer transistor. This is especially true for a buffer transistor fabricated using current technologies, in which case the thickness of the gate insulator of the buffer transistor has decreased from the thickness obtained using previous fabrication technologies. As the thickness of the gate insulator decreases, the breakdown voltage of the gate insulator decreases. Thus, the breakdown voltage of the buffer transistor is often below the potential established on the bond pad by the ESD circuit.
Thus, a need exists to provide a voltage protection circuit which eliminates breakdown of buffer transistors having low breakdown voltages.